JPH0152776B2 - - Google Patents

Info

Publication number
JPH0152776B2
JPH0152776B2 JP16166980A JP16166980A JPH0152776B2 JP H0152776 B2 JPH0152776 B2 JP H0152776B2 JP 16166980 A JP16166980 A JP 16166980A JP 16166980 A JP16166980 A JP 16166980A JP H0152776 B2 JPH0152776 B2 JP H0152776B2
Authority
JP
Japan
Prior art keywords
input
output
signal
bus control
output bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP16166980A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5785129A (en
Inventor
Junichi Kihara
Yoshuki Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP16166980A priority Critical patent/JPS5785129A/ja
Publication of JPS5785129A publication Critical patent/JPS5785129A/ja
Publication of JPH0152776B2 publication Critical patent/JPH0152776B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP16166980A 1980-11-17 1980-11-17 Input/output controller Granted JPS5785129A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16166980A JPS5785129A (en) 1980-11-17 1980-11-17 Input/output controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16166980A JPS5785129A (en) 1980-11-17 1980-11-17 Input/output controller

Publications (2)

Publication Number Publication Date
JPS5785129A JPS5785129A (en) 1982-05-27
JPH0152776B2 true JPH0152776B2 (en]) 1989-11-10

Family

ID=15739580

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16166980A Granted JPS5785129A (en) 1980-11-17 1980-11-17 Input/output controller

Country Status (1)

Country Link
JP (1) JPS5785129A (en])

Also Published As

Publication number Publication date
JPS5785129A (en) 1982-05-27

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